Bruno Ciciani’ s publication list


Last pubblications: 
http://www.informatik.uni-trier.de/~ley/pers/hd/c/Ciciani:Bruno 



Old pubblications

International Conferences

 

IC 70)    P. Romano, F. Quaglia, B. Ciciani

APART+: Boosting APART Performance via Optimistic Pipelining of Output Events.

22nd  IEEE International Parallel and Distributed Processing Symposium - DPDNS Workshop

Rome, Italy.  IEEE Computer Society Press, May, 2009

 

IC 69)    P. Di Sanzo, P. Romano, B. Ciciani., F. Quaglia

A Performance Model of Multi-Version Concurrency Control.

Proc. 16th IEEE Intern Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication.

Baltimore, USA. IEEE Computer Society Press, July 2008.

 

IC 68)    P. RomanoD. RughettiF. Quaglia, B. Ciciani

 APART: Low Cost Active Replication for Multi-tier Data Acquisition Systems

Proc.  6th IEEE International Symposium on Network Computing and Applications (NCA),

Cambridge, MA, USA, IEEE Computer Society Press, July 2008.

 

IC 67)    P. Romano, B. Ciciani, A. Santoro, F. Quaglia

 Accuracy vs Efficiency of Hyper-exponential Approximations of the Response Time Distributions of MMPP/M/1 Queues

21st EEE International Parallel and Distributed Processing Symposium - DPDNS Workshop.

Miami, USA. April.

 

IC66)     Paolo Romano, Bruno Ciciani, Andrea Santoro, Francesco Quaglia

Fast Computation of Hyper-exponential Approximations of the Response Time Distribution of MMPP/M/1 Queues

Proc. 41th Annual Simulation Symposium,

               Ottawa, Canada, April 2008

 

IC65)     B. Ciciani, A. Santoro, P. Romano

Approximate Analytical Models for Networked Servers Subject to MMPP Arrival Processes

Proc.  6th IEEE International Symposium on Network Computing and Applications (NCA),

Cambridge, MA, USA, IEEE Computer Society Press, July 2007.

 

IC64)     P.Romano, F.Quaglia and B.Ciciani
A Simulation Study of the Effects of Multi-path Approaches in e-Commerce Applications,

11th IEEE Workshop on Dependable Parallel, Distributed and Network-Centric Systems,

Rhodes Island, Greece, April 2006.

 

IC63)     P.Romano, F.Quaglia and B.Ciciani,
Design and Evaluation of a Parallel Edge Server Invocation Protocol for Transactional Applications over the Web ,
Proc. 6th IEEE Symposium on Applications and the Internet (SAINT),
Phoenix, Arizona, USA, January 2006.

 

IC62)    F.Quaglia, A. Santoro and B.Ciciani
Towards Transparent Optimistic Synchronization in HLA, 
Proc. FIRB-Perf Workshop on Techniques, Methodologies and Tools for Performance Evaluation of Complex Systems (FIRB-Perf 2005), Torino, Italy, IEEE Computer Society Press, September 2005.

 

IC61)     P.Romano, F.Quaglia and B.Ciciani,
Design and Analysis of an e-Transaction Protocol Tailored for OCC , 
Proc. 5th IEEE Symposium on Applications and the Internet (SAINT),

Trento, Italy, IEEE Computer Society Press, January/February 2005.

 

IC60)     P.Romano, F.Quaglia and B.Ciciani,
Ensuring e-Transaction Through a Lightweight Protocol for Centralized Back-end Database , 
Proc. 2nd International Symposium on Parallel and Distributed Processing and Applications (ISPA), Hong Kong, China, LNCS, Springer-Verlang, December 2004.

 

IC59)     P.Romano, F.Quaglia and B.Ciciani,
A Protocol for Improved User Perceived QoS in Web Transactional Applications , 
Proc. 3rd IEEE International Symposium on Network Computing and Applications (NCA),

Cambridge, MA, USA, IEEE Computer Society Press, August/September 2004.

 

IC58)     Y. Diao, B. Ciciani, and C.H. Crawford,
Enforcing Quality of Service Using Decentralized Runtime Feedback Control, 
The Computer Measurement Group’s International Conference,

                Dallas, USA, December 2003.

 

IC57)     B. Ciciani, D. Dias, and  F. Quaglia,

Analysis of Design Alternatives for Reverse Proxy Cache Providers,

Proc. of 11th IEEE/ACM Int'l Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS'03),

            Orlando, USA, October 2003.

 

IC56)     P.Romano, M.Romero, B.Ciciani and F.Quaglia,
Validation of the Sessionless Mode of the HTTPR Protocol , 
Proc. 23rd IFIP International Conference on Formal Techniques for Networked and Distributed Systems (FORTE'03),

Berlin, Germany, October 2003.

 

IC55)     R. Lancellotti, B. Ciciani, and M. Colajanni,

Distributed Cooperation Schemes for Document Lookup in Multiple Cache Servers,

Proc. IEEE International Symposium on Network Computing and Applications (NCA’03), 

Boston, USA, April 2003.

 

IC54)     F. Quaglia, A. Santoro and B. Ciciani,

Trade-offs in Overhead vs Effectiveness of Causality Inconsistency Tracking for Preemptive Rollback in Optimistic Simulation,

Proc.  6th IEEE Int. Workshop on Distributed Simulation and Real Time Applications (DS-RT’02),

Fort Worth (Texas, USA), October 2002.

 

IC53)     M.E. Poleggi, B. Ciciani, M. Colajanni,

Global Caching Mechanisms in Clusters of Web Servers,

 Proc. of 10th IEEE/ACM Int'l Symp. on Modeling, Analysis and Simulation of Computer and Telecommunication Systems (MASCOTS'02),

Fort Worth, TX, USA, October 2002.

 

 IC52)    R. Lancellotti, B. Ciciani, and M. Colajanni,

 A Scalable Architecture for Cooperative Web Caching,

IFIP Workshop on Web Engineering,

 Pisa, May 2002.

 

IC51)     F. Quaglia, A. Santoro and B. Ciciani,

Conditional Checkpoint Abort: an Alternative Semantic for Re-synchronization in CCL,

Proc. 16th ACM/IEEE/SCS Workshop on Parallel and Distributed Simulation (PADS'02),

Washington (DC, USA), May 2002.

 

IC50)     A. Santoro, B. Ciciani, M. Colajanni and F. Quaglia,

Two-tier Cooperation: a Scalable Protocol for Web Cache Sharing,

Proc. IEEE International Symposium on Network Computing and Applications (NCA’01),

Cambridge (MA, USA), October 2001.

 

 

IC49)     F. Quaglia, A. Santoro and B. Ciciani,

Tuning of the Checkpointing and Communication Library for Optimistic Simulation on Myrinet Based NOWs,

Proc. 9th IEEE International Symposium on Modeling, Analysis and   Simulation of Computer and Telecommunication Systems (MASCOTS'01),

Cincinnati (Ohio, USA), pp.241-248, August 2001

 

IC48)     E. Casalicchio, M. E. Poleggi, B. Ciciani, M. Colajanni, 
Global Caching in Parallel Web Server', 
WSDAAL'00 
Ischia, Sept. 2000 

IC47)     F. Quaglia, B. Ciciani, M. Colajanni,

An Analytical Comparison of Cooperation Protocols for Web Proxy Servers,

7th IEEE Int. Symposium on Modeling, Analysis and Simulation of

Computer and Telecommunication Systems (MASCOTS'99)

College Park MD, Maryland, October 1999.

 

IC46)     M. Colajanni, B. Ciciani, F. Quaglia,

Performance Analysis of Wormhole Switching with Adaptive Routing in a Two-Dimensional Torus,

                Parallel Processing,

Toulose, France, September 1999.

 

IC45)     M. Romero, B. Ciciani,

                A Parallel Architecture for Stereoscopic Processing,

                Parallel Processing,

                Toulose, France, September 1999.

 

IC44)     R. Baldoni, F. Quaglia, B. Ciciani,

                A VP-accordant Checkpointing Protocol Preventing Useless Checkpoints,

                17th IEEE Symposium on Reliable Distributed Systems (SRDS’98),

                West Lafayette, October 1998.

 

IC43)     G. Battaglini, B. Ciciani,

                An Improved Analytical Yield Evaluation Method for Redundant RAMs,

1998 IEEE International Workshop on Memory Technology, Design and Testing,

                San Jose, August 1998.

 

IC42)     F. Quaglia, B. Ciciani, R. Baldoni,

                Checkpointing Protocols in Distributed Systems with Mobile Hosts,

                IEEE Workshop on Fault-Tolerant Parallel and Distributed Systems,

Orlando, April 1998.

 

IC41)     A. Chiari, B. Ciciani, M. Romero, R. Rossi,

                Depth Controlled 3DTV Image Coding

                IS&T/SPIE’s 1998: Symposium on Electronic Imaging: Science&Technology

                San Jose, January 1998.

 

IC40)     F. Quaglia, R. Baldoni, B. Ciciani,

                Ticket Access Methods for MultiDataBase Global Concurrency Control Algorithms,

                EURO-PDS97,

                Barcellona, Spain, June 1997.

 

IC39)     G. Battaglini, B. Ciciani,

                A Simulation based Analysis of the Geometric Defect Distribution,

                IEEE European Test Workshop 1997,

                Cagliari, Italy, May 1997.

 

IC38)     A. Chiari, B. Ciciani, M. Romero,

                A Fault-Robust SPMD Architecture for 3D-TV Image Processing,

                IEEE Workshop on Fault -Tolerant Parallel and Distributed Systems,

                Geneva, Switzerland, April 1997.

 

IC37)     F. Quaglia, B. Ciciani, R. Baldoni,

                A Checkpointing-Recovery Scheme for Domino Free Distributed Systems,

                IEEE Workshop on Fault -Tolerant Parallel and Distributed Systems,

                Geneva, Switzerland, April 1997.

 

IC36)     B. Ciciani, M. Colajanni, C. Paolucci,

                An Accurate Model for the Performance Analysis of Deterministic Wormhole Routing,

                IEEE/ACM 11th International Parallel Processing Symposium,

                Geneva, Switzerland, April 1997.

 

IC35)     F. Quaglia, R. Baldoni, B. Ciciani,

                A Low-Overhead Z-cycle-free Checkpointing Algorithm for Distributed Systems,

                ERSADS’97 (2nd European Research Seminar on Advances in Distributed Systems),

Valais, Switzerland, March 1997.

 

IC34)     B. Ciciani, A. Pasquini,

                Software Reliability Models and Test Coverage,

                SAFECOMP'96,

                Vienna, Austria, October 1996.

 

IC33)     M. Capiello, A. Chiari, B. Ciciani,

A Graceful Degradation Embedded Computing System for 3D-TV Image Disparity Estimation,

                IEEE International Workshop on Embedded Fault-Tolerant Systems,

                Dallas,Texas, September 1996.

 

IC32)     M. Colajanni, A. Dell'Arte, B. Ciciani,

Communication Switching Techniques and Link-Conflict Resolution Strategies:

A Comparison Analysis,

                EUROSIM '95,

                Vienna, Austria, September 1995.

 

IC31)     B. Ciciani, S. Racciatti, R. Baldoni,

                Performance Study of Distributed Global Concurrency Control for    Multidatabase Systems,

                European Simulation Multiconference,

                Prague, Ceck, June 1995.

 

IC30)     R. Baldoni, B. Ciciani,

                A Phase-based Mutual Exclusion Algorithm for Computer Networks,

                IEEE PDCS-94 Conference,

                Las Vegas, October 1994.

 

IC29)     B. Ciciani, M. Angelaccio,

                An Interface to Develop Time-Warp based Simulations,

                International Conference Massively Parallel Processing,

                Delft, Netherlands, June 1994.

 

IC28)     B. Ciciani, S. Tucci,

                Performance Evaluation of an Adaptive Routing Algorithm,

                International Conference Massively Parallel Processing,

                Delft, Netherlands, June 1994.

 

IC27)     R. Baldoni, B. Ciciani,

               The NETSHELL programming environment,

               2nd EUROMICRO Workshop on Parallel and Distributed Processing,

               Malaga, Spain, January 1994.

 

IC26)     M. Gabrielli, B. Ciciani,

                A Quantitative Comparison of Routing Algorithms for Toroidal  Interconnection Networks,

                European Simulation Symposium,

                Delft, Netherlands, October 1993.

 

IC25)     R. Baldoni, B. Ciciani,

                How to Insert Priority in Token-Based Mutual Exclusion Algorithms

                AICA '93 - International Section,

                Lecce, Italy, September 1993.

 

IC24)     G.F. Calavaro, B. Ciciani, S. Tucci,

                Routing Algorithms for Hypercube Interconnection Networks,

                Eurosim 92,

                Capri, Italy, September 1992.

 

IC23)     B. Ciciani, S. Tucci,

                On Modeling Link Conflict Resolution Strategies for Circuit Switching Hypercubes,

                IEEE CompEuro 91,

                Bologna, Italy, May 1991.

 

IC22)     B. Ciciani,

                Modeling the Effects of Imperfect Production Testing on Reconfigurable VLSI Chips,

                1991 IEEE VLSI Test Symposium,

                Atlantic City, April 1991.

 

IC21)     B. Ciciani, C. Comella, G. D'Ippolito,

                Efficient Programming of Distributed Simulation Control Algorithms,

                1990 Summer Computer Simulation Conference,

                Calgary, Canada, July 1990.

 

IC20)     B. Ciciani, S. Tucci,

                Performance Analysis of Hypercube Interconnection Network,

                Parallel Computing,

                Capri, Italy, June 1990.

 

IC19)     B. Ciciani,

                Yield Evaluation of Tree Dynamic RAMs,

                13th Fault Tolerant Systems and Diagnostics,

                Varna, Bulgaria, June 1990.

 

IC18)     B. Ciciani, D. Dias, P. S. Yu,

Performance Comparison of Concurrency Control Protocols for Transaction Processing

Systems with Regional Locality,

                IEEE 8th Symposium on Reliable Distributed Systems,

                Seattle, October 1989.

 

IC17)     B. Ciciani, G. Iazeolla,

                A Model for VLSI Chip Yield Evaluation with Topologically Constrained Architecture,

                IEEE '89 International Conference on Computer Design,

                Cambridge, Great Britain, October 1989.

 

IC16)     B. Ciciani, G. Cioffi, A. Pugnaloni,

                A Message Passing Multiprocessor Prototype: Architectural and Operating System Aspects,

                3rd European Simulation Conference,

                Edimburg, Great Britain, September 1989.

 

IC15)     B. Ciciani, G. Cioffi,

                Fault Tolerant Characteristics of the RDCP Language,

                12th Fault Tolerant Systems and Diagnostics,

                Praha, Ceck, September 1989.

 

IC14)     B. Ciciani, G. Cantone,

                Optimal Checkpointing in Real-Time Consumer Environment,

                12th Fault Tolerant Systems and Diagnostics,

                Praha, Ceck, September 1989.

 

IC13)     B. Ciciani, C. Comella,

                Time Warp Distributed Simulation in Transputer Computing Environment,

                European Simulation Multiconference '89,

                Roma, Italy, June 1989.

 

IC12)     B. Ciciani, G. Iazeolla,

                A Straighforward Yield Model for Fault Tolerant VLSI Memory Chips,

IFIP 10th Conference on Design Methodology in VLSI and Computer Architecture,

                Pisa, Italy, September 1988.

 

IC11)     B. Ciciani, G. Cantone,

                Modelling a New Checkpointing Strategy for Distributed Systems,

                IMACS 12th World Congress on Scientific Computation,

                Paris, France, July 1988.

 

IC10)     B. Ciciani, D. Dias, P. S. Yu,

                Load Sharing in Hybrid Distributed-Centralized Database Systems,

                IEEE 8th International Conference on Distributed Computing Systems,

                San Jose, June 1988.

 

IC9)       B. Ciciani, B. R. Iyer,  D. Dias, P. S. Yu,

                On Hybrid Distributed-Centralized Database Systems,

                IFIP Conference on Distributed Processing,

                Amsterdam, Netherlands, October 1987

 

IC8)       B. Ciciani, G. Cioffi,

                A Proposal for Autonomous and Dynamic Cooperating Processes,

                IFIP Conference on Distributed Processing,

                Amsterdam, Netherlands, October 1987.

 

IC7)       G. Cantone, B. Ciciani,

                Inserting State Restoration Requests in Systems of Distributed Processes,

                Euromicro Conference,

                London, Great Britain, September 1987.

 

IC6)       B. Ciciani, V. Grassi, G. Iazeolla,

                Yield and Performability Evaluation of VLSI Reconfigurable Multiprocessor  Structures,

                ACM 2nd International Workshop on Applied Mathematics and

                Performance/Reliability Models of Computer/Communication Systems,     

Roma, Italy, May 1987.

 

IC5)       G. Cantone, B. Ciciani,

                An Approach to an Optimal Strategy of Recovery Point Insertion in Distributed Fault Tolerant

Computing Systems,

                24th. Allerton Conference on Communication, Control and Computing,

                Allerton, October 1986.

 

IC4)       G. Cantone, A. Cimitile, B. Ciciani,

                An Approach to the Static and Dynamic Insertion of State Restoration  Requests in

Concurrent Processes Communicating by Message Passing,

                Iasted International Symposium,

                Taormina, Italy, September 1986.

 

IC3)       G. Cantone, B. Ciciani,

An Approach to the Fault Detection and Recovery of Concurrent Processes Communicating by Synchronous and Asynchronous Message Passing,

                Iasted International Symposium,

                Taormina, Italy, September 1986.

 

IC2)       B. Ciciani,

An Integrated Approach for the Treatment of Transient and Permanent Faults in Distributed Processing Systems,

                2nd International Symposium on Applied Informatics,

                Innsbruck, Austria, February 1984.

 

IC1)       B. Ciciani, G. Cioffi, G. Di Vito,

                A Multimicro Prototype: Architectural an Operating Systems Aspects,

                International Conference on Parallel Computers and Scientific Computation,

                Roma, Italy, March 1982.

 


International Journals

 

 

IJ28)      P. Romano, Bruno Ciciani, Andrea Santoro, Francesco Quaglia,

Accuracy vs efficiency of hyper-exponen tial approximations of the response time distribution of MMPP/M/1 queues

International Journal of Parallel, Emergent and Distributed Systems,

in printing

 

IJ27)      P. Romano, F. Quaglia, B. Ciciani,

A Lightweight and Scalable e-Transaction Protocol for Three-Tier Systems with Centralized Back-End Database
IEEE Transactions on Knowledge and Data Engineering,

vol.17, no.11, pp.1578-1583, 2005.

 

IJ26)      F. Quaglia, B. Ciciani, M. Colajanni

Performance Analysis of Adaptive Wormhole Routing in a Two-Dimensional Torus

                Parallel Computing, ELSEVIER,

Vol. 28, N. 3, 2003, pp. 485-501.

 

IJ25)      F. Quaglia, R. Baldoni, B. Ciciani,

On the no-z-cycle Property in Distributed Executions,

Journal of Computer and System Sciences

      Vol.61, N.3, 2001, pp. 400-427.

 

IJ24)      F. Quaglia, V. Cortelessa, B. Ciciani,

                Tradeoff  between sequential and Time Warp based parallel simulation,

                IEEE Transactions on Parallel and Distributed Systems,

                Vol. 10, N. 8, 1999, pp. 781-194.

 

IJ23)      F. Quaglia, B. Ciciani,

                Performance vs Cost of Rendundant Arrays of Inexpensive Disks,

                Journal Simulation Practice and Theory (Elsevier),

                Vol. 2, N. 15, 1999, pp. 153-17.

 

IJ22)      G. Battaglini, B. Ciciani,

                Realistic Yield Evaluations of Fault Tolerant PLA's,

                IEEE Transactions on Reliability,

                Vol. 47, N. 3, 1998, pp. 212-224.

 

IJ21)      F. Quaglia, R. Baldoni, B. Ciciani,

Mulidatabase Concurrency Control Algorithms: a Performance Analysis,

                Foundations on Computing and Decision Sciences,

                Vol. 23, N. 1, 1998, pp. 15-33.

 

IJ20)      B. Ciciani, M. Colajanni, C. Paolucci,

                Performance Evaluation of Deterministic Wormhole Routing in K-ary N-cubes,

                Parallel Computing,

                Vol. 24, N. 14, 1998, pp. 2053-2075

 

IJ19)      L.R. Auriche, F. Quaglia, B. Ciciani,

                Run-time Selection of the Checkpoint Interval in Time Warp Based     Simulations,

                Journal Simulation Practice and Theory (Elsevier),

                Vol. 6, N. 5, 1998, pp. 461-478.

 

IJ18)      M. Colajanni, B. Ciciani, S. Tucci,

                Performance Analysis of Circuit-Switching Interconnection Networks with Deterministic and Adaptive Routing,

                Performance Evaluation (North Holland),

                Vol. 34, N. 1, 1998 pp. 1-26

 

IJ17)      M. Colajanni, A. Dell'Arte, B. Ciciani,

                Performance Evaluation of Message Passing Strategies and Routing Policies in Multicomputers,

                Journal Simulation Practice and Theory (Elsevier),

                Vol. 6, N. 4, 1998, pp. 369-385

 

IJ16)      B. Ciciani, S. Tucci,

                On Modelling of an Adaptive Routing Algorithm for Massively Parallel Processing Systems,

                Journal Simulation Practice and Theory (Elsevier),

                Vol.3, N. 2, 1995, pp. 237-255.

 

IJ15)      R. Baldoni, B. Ciciani,

A Class of High Performance Maekawa-type Algorithms for Distributed Systems Under Heavy Demand,

                Distributed Computing (Springer International),

                Vol. 8, N. 4, 1995, pp. 171-180.

 

IJ14)      R. Baldoni, B. Ciciani, G. Cioffi,

                On Correctness of Goscinski's Algorithm,

                Journal of Parallel and Distributed Computing (Academic Press),

                Vol. 27, N. 2, 1995, pp. 201-204.

 

IJ13)      R. Baldoni, B. Ciciani,

                Distributed Algorithms for Multiple Entries to a Critical Section with Priority,

                Information Processing Letters (Elsevier),

                Vol. 50, N. 3, March 1994, pp. 165-172.

 

IJ12)      B. Ciciani, D. Dias, P. S. Yu,

Analysis of Concurrency-Coherency Control Protocols for Transaction Processing Systems with Regional Locality,

                IEEE Transactions on Software Engineering,

                Vol. 18, N. 10, October 1992, pp. 899-914.

 

IJ11)      B. Ciciani,

                Fault Tolerance Considerations for Redundant Binary Tree Dynamic RAMs,

                IEEE Transactions on Reliability,

                Vol. 41, N. 1, March 1992, pp. 139-148.

 

IJ10)      B. Ciciani, D. Dias, P. S. Yu,

                Dynamic and Static Load Sharing in Hybrid Distributed-Centralized Database Systems,

                Computer Systems Science and Engineering (CRL Publishers Ltd),

                Vol. 7, N. 1, January 1992, pp. 25-44.

 

IJ9)         B. Ciciani, G. Iazeolla,

                A Markov Chain Based Yield Formula for VLSI Fault Tolerant Chips,

                IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems,

                Vol. 10, N. 2, February 1991, pp. 252-259.

 

IJ8)         B. Ciciani,

                Redundancy Effect on Yield of Binary Tree RAMs,

                Journal of Electronic Testing (Kluwer Academic Publishers),

                Vol. 8, N. 2, June 1991, pp. 293-306.

 

IJI7)       B. Ciciani, D. Dias, B. R. Iyer, P. S. Yu,

                A Hybrid Distributed-Centralized System Structure for Transaction Processing,

                IEEE Transactions on Software Engineering,

                Vol. 16, N. 8, August 1990, pp. 791-805.

 

IJ6)         B. Ciciani, D. Dias, P. S. Yu,

                Analysis of Replication in Distributed Data Base Systems,

                IEEE Transactions on Knowledge and Data Engineering,

                Vol. 2, N. 2, June 1990, pp. 247-261.

 

IJ5)         B. Ciciani, G. Cantone,

                Comments on Design and Evaluation of Fault-Tolerant Multiprocessor Using Hardware Recovery Blocks,

                IEEE Transactions on Computers,

                Vol 38, N. 9, September 1989, pp. 1336-1337.

 

IJ4)         B. Ciciani, V. Grassi,

                Performability Evaluation of Fault-Tolerant Systems,

                IEEE Transactions on Communications,

                Vol. 35, N. 4, April 1987, pp. 403-409.

 

IJ3)         B. Ciciani, G. Di Vito,

                Two Distributed Procedures for the Process Termination in ECSP Environment,

                Mini and Microcomputers (Acta Press),

                Vol. 6, N. 3, September 1984, pp. 44-48.

 

IJ2)         B. Ciciani, G. Di Vito, M. Rosati,

An Efficient Strategy for the Detection of Fault and a Domino Free Recovery in Distributed Processing Systems,

                Microprogramming and Microprocessing (North Holland),

                Vol. 14, N. 3, August 1984, pp. 29-34.

 

IJ1)         P. Velardi, B. Ciciani,

                Recovery Blocks for Communicating Systems,

                Microprogramming and Microprocessing (North Holland),

                Vol. 13, N. 2, May 1983, pp. 287-293.

 

 

 

Scientific Monographies and Books

 

B9)         F. Quaglia, B. Ciciani, R. Baldoni,

                Checkpointing Protocols in Distributed Systems with Mobile Hosts, 

Parallel and Distributed Processing”, J. Rolim editor, Lecture Notes in Computer Science, Springer, 1998, pp. 742-755.

 

B8)         A. Chiari, B. Ciciani, M. Romero,

                A Fault-Robust SPMD Architecture for 3D-TV Image Processing

                “Fault Tolerant Parallel and Distributed Systems”, D. R. Avresky and D.K. Kaely editors, Kluwer, 1998, pp. 231-246.

 

B7)         F. Quaglia, B. Ciciani, R. Baldoni,

             A Checkpointing-Recovery Scheme for Domino Free Distributed Systems,

              “Fault Tolerant Parallel and Distributed Systems”, D. R. Avresky and D. K. Kaely editors, Kluwer, 1998, pp. 93-108.

 

B6)         B. Ciciani,

                “Manufacturing Yield Evaluation of VLSI/WSI Systems”,

                IEEE Computer Society Press, 1995.

 

B5)         B. Ciciani, V. de Nitto Personè, G. Iazeolla, F. Marinuzzi,

LISPACK/SIMCOR a parallel tool for the performance evaluation of massively parallel computer architectures,

Project: Parallel Architectures,

National Research Council, 1993, pp. 235-246.

 

B4)         B. Ciciani,

                Yield Evaluation of Tree Dynamic RAMs,

                “Hardware and Software Fault Tolerance in Parallel Computing  Systems”,

                Ellis Horwood Limited, 1992, pp. 169-184.

 

B3)         B. Ciciani, S. Tucci,

                Performance Analysis of Hypercube Interconnection Network,

                “Parallel Computing”,

                Elsevier, 1992, pp. 439-450.

 

B2)         B. Ciciani, V. Grassi, G. Iazeolla,   

                Yield and Performability Evaluation of VLSI Reconfigurable Multiprocessor  Structures,

                “Computer Performance and Reliability”,

                North-Holland, 1988, pp. 369-382.

 

B1)         F. Baiardi, B. Ciciani, G. Cioffi, G. Di Vito, A. Fantechi, A. Tomasi, M. Vanneschi,

                The Operating System Kernel of a Message Passing Distributed  Multiprocessor,

“The Muteam Experiences in Designing Distributed Systems of Microprocessors”,

                National Research Council, 1983, pp. 93-122.

 

 

 

 

Didactics Book (in Italian)

 

 

DB7)      M. Colajanni, B. Ciciani,

                Section "WWW Infrastuctures" of  "Informatics Handbook",

                Editore Calderini, 2002.

 

DB6)      B. Ciciani, F. Quaglia,

                Section "Real-Time and Reliable Computing Systems" of  "Informatics Handbook",

                Editore Calderini, 2002.

 

DB5)      G. Cioffi, B. Ciciani,

                Section "Architectures of Computing Systems" of  "Informatics Handbook",

                Editore Calderini, 2002.

 

DB4)      G. Cioffi, B. Ciciani,

                Logic Network Design,

                Mc. Graw Hill, 1998

 

DB3)      G. Cioffi, B. Ciciani, S. Congiu,

                Microprogramming and Microprocessors

                Ed. Ingegneria 2000, 1994

 

DB2)      B. Ciciani,

                Architecture of the PD32 Processor ,

                Editore CUD, 1993.

 

DB1)      B. Ciciani, A. Pugnaloni,

                Logic Network Projects,

                Editore Siderea, 1986.